1. Field of the Invention
This invention relates to a method for forming a resist pattern applied to fine processing, such as preparation of a semiconductor device, and a system or device resulting therefrom. More particularly, it relates to a method and an apparatus for improving resist pattern linewidth stability by accurate time control from the end of light exposure until heat treatment or cooling and by temperature and process time control of the resist coating/development device.
2. Description of the Related Art
In the field of preparation of semiconductor devices, the design rule refinement is proceeding at an amazing speed. The technique of fine processing capable of achieving the minimum processing size on the order of 0.35 .mu.m and on the order of 0.25 .mu.m is required for the 64 MDRAM of the next generation and for the 256 MDRAM of the next-to-next generation. The key technology for such fine processing is photolithography. Research into the far ultraviolet lithograph employing a far UV light source such as a KrF eximer laser light beam (.lambda.=248 nm) are now proceeding briskly as one of the alternatives of the photolithographic techniques.
In the above-described ultra-fine processing, the accuracy demanded of the resist pattern is generally .+-.10% of the design rule. Thus, for the design rule of 0.35 .mu.m, for example, the accuracy demanded is .+-.0.035 .mu.m.
Such accuracy is deteriorated by various factors related to various photolithographic operations, such as light exposure, resist coating or development. What is desired in connection with the resist coating/development device (coater/developer) is the uniform resist film thickness, uniform resist development speed and a wafer environment control for attaining such uniform resist film thickness and uniform resist development speed. These desired objective have recently been felt most strongly as the chemical amplification resist material has attracted attention as a resist material for eximer laser lithography. The reason is that, since the acid catalyst taking part in a resist reaction of the chemical amplification resist material is of an extremely small quantity, pattern accuracy is affected significantly by the slightest fluctuations in the wafer atmosphere. Consequently, various measures have been taken in the resist coating/developing device for controlling the wafer environment.
FIG. 1 shows an arrangement of a customary resist coating/development system. This system includes a series of integrated units comprised of a carrier station (C/S) 1 for transporting wafers into and out of a cassette containing a large number of wafers, plural processing units for executing contiguous process steps and a transportation system (H) 16 for transporting wafers into and out of the processing units and a light exposure device.
FIG. 1 shows a left block and a right block, separated from each other by broken lines, and taken charge of by the same transporting system. With the integrated transporting system, shown in FIG. 1, wafer transportation between specified processing units in a given processing block influenced by the temperature and the time and those in the processing block not influenced by the temperature and the time may be carried out by the same transporting system. Among the processing units, there are a hydrophobic processing unit (HMDS) 7 for carrying out hexamethyl disilazane treatment for improving tightness of bonding between the wafer and the layer of the resist material, a resist coating unit (Coat) 9, heating units (HP) 7, a development unit (Dev) 4 and cooling/temperature conditioning units (C) 3, 8.
The transporting device (H) 16 includes a transport arm (A) 17 for handling the wafer. The transport arm (A) 17 is thermally isolated from the heating units (HP) 2, 7 and maintained at a temperature approximately equal to the temperature within the clean room, such that thermal stability on the order of .+-.0.2.degree. C. is achieved. The wafer processing system may be split into two blocks with an interfacing unit IF in-between, in which case the heating, cooling/temperature control (C) is carried out by one and the same transport system.
The heating units (HP) 2, 7 are provided with enclosed hot-plates, heated in general to 80 to 120.degree. C., and are employed for pre-baking for volatilizing the solvent in the resist coating film for stabilizing resist sensitivity and the residual film rate, post-exposure baking (PEB) for progression of a resist reaction after light exposure, or post-baking for improving thermal resistance or resistance against dry etching of the formed resist pattern.
The cooling/temperature control units (C) 3, 8 are provided with metal cooling plates maintained at 20 to 25.degree. C. by circulation of cooling water, and are employed for temperature controlling the wafer before resist coating or development of wafer cooling after the end of the heating and hydrophobic processing treatment.
With the above-described system, the process parameters of each unit need be controlled strictly. For example, with a semiconductor device fabricated with the design rule of 0.35 .mu.m, the resist film thickness and linewidth are required to be uniform on the order of .+-.2.3 .mu.m and .+-.0.035 .mu.m, respectively. Thus the wafer temperature and the process time in the resist coating unit and in the development unit are controlled to be within the ranges of accuracy of .+-.0.1.degree. C. and less than 0.1 second, respectively. On the other hand, since the heating operations, such as pre-baking or PEB, are parameters influencing the resist sensitivity, the processing in the heating units taking charge of these heating operations are also controlled stringently. With the conventional resist coating/development device, as described above, the process parameters in each unit are controlled stringently. It has however been found that temperature control of the wafers transported into the resist coating unit or the development unit and total control of the heating time cannot as yet been achieved satisfactorily.
For example, the transport arm (A) 17 of the same transporting device (H) 16 shown in FIG. 1 is gradually raised in its temperature as it repeatedly transports pre-baked wafers or post-exposure-baked wafers out of the heating units (HP) 2, 7 under the action of heat accumulation. Consequently, if the temperature-controlled wafer is transported out of the cooling/temperature control unit (C) 38 and into the resist coating unit or development unit, using the same transport arm (A) 17, the wafer temperature is increased by about 0.5 to 1.5 degree in less than one minute in which the wafer is held by the transport arm. The resist film thickness is known to be changed in thickness at a rate of 5 to 10 nm/.degree. C. Such temperature rise causes resist film thickness fluctuations exceeding the range of fluctuations of .+-.2.3 nm allowed under the design rule of 0.35 .mu.m.
On the other hand, the total heating time is changed in the following cases. For example, if, in the right-hand side block of FIG. 1, the same transport arm (A) 17 is engaged in the wafer transport for other processing operations, it may occur that the heated wafer cannot be taken out of the heating unit (HP) 7, or the wafer taken out cannot be immediately transported to the next cooling/temperature control unit (C) 8. This is equivalent to prolonging the effective heating time. Above all, if a chemical amplification type resist susceptible to a wafer atmosphere is employed, prolonged exposure of the wafer to outside atmosphere at an elevated temperature leads to deactivation of an acid catalyst and to significant deterioration in linewidth stability.
The above-described circumstances which lead to the worsening of the linewidth stability similarly exist for the case in which the system is split into left and right blocks with the interfacing unit 5 in-between and in which the wafers of the left and right blocks are transported by one and the transport system.
The chemical amplification type resist is a photoresist material in which the acids generated on decomposition of an photo-acid generator on exposure to light act as catalysts for resist reactions such as cross-liking or polymerization of the base resin or transformation of functional groups during the next post-exposure baking (PEB) process for producing changes in local solubility in the developing solution. It is however known that, since the acid as the catalyst exists in an extremely small quantity, the linewidth stability in case of employing the chemical amplifier type resist material is affected significantly by the least changes in the processing conditions.
These factors of fluctuations are present in a number of photolithographic operations, such as light exposure, resist coating, baking, and thus a variety of countermeasures have been proposed in connection with the light exposure device or the resist coating/developing deice (coater/developer).
Among the countermeasures concerning the resist coating/developing device, there is a process control known as TACT control. This control resides in a process in which the process time or TACT (scheduled wafer transportation) time in the resist coating, baking and development units is set to a pre-set value so that processing in each wafer is carried out by the same process flow. This method has led to resolution of wafer stagnation in the usual processing processes of the system or resulting fluctuations in the baking time, thereby achieving improvement in linewidth stability, although to a limited extent.
However, the parameter affecting pattern accuracy most significantly in the pattern formation employing the chemical amplifier resist is the time which elapses since the end of light exposure until start of PEB. If, with the use of a positive resist, for example, acids produced on light exposure are diffused within such time into the non-exposed area to decompose a solution inhibiting agent in an excess amount, the pattern linewidth tends to be finer or contract tends to be lowered. Conversely, should hexamethyl disilazane (HMDS) used for hydrophobic processing treatment, resist developing solution, paint used for the wall surface of a clean room or alkali vapor derived from a high efficiency particle air (HEPA) filter, be present at this time in the atmosphere, the acids tend to be deactivated, thus enlarging the line width.
However, the above-mentioned TACT control refers to time control between respective processes carried out in the resist coating/development device, such that it is not possible with TACT control to adjust the timing between one of the processes and the process carried out in the light exposure device. This induces the following problem.
With TACT control, process time fluctuations are produced with the TACT time as a unit. If, for example, the TACT time is set to 100 seconds, the wafer for which the light exposure has come to an end within 100 seconds is immediately transported to the PEB process. On the other hand, the wafer for which 101 seconds were consumed for light exposure needs to rest in a stand-by state for as long as 99 seconds until the next transport timing. That is, the process time difference of one second in the previous process is enlarged to a time difference of 100 seconds prior to the start of the next process.
The experiments conducted by the present inventor have revealed that, if a linewidth of 0.35 .mu.m is formed using a chemical amplifier resist material manufactured by SIPLAY INC. under the trade name of XP8843, the linewidth was fluctuated by as much as 0.05 .mu.m by changes in the time since light exposure until PEB of 100 seconds. Besides, the line pattern was fluctuated by as much as 0.10 .mu.m in an amine atmosphere of 1 ppm. Our tentative calculations have revealed that the tolerance for linewidth uniformity for the 0.35 .mu.m design rule is .+-.0.023 .mu.m, which is clearly exceeded with the above linewidth fluctuations.
For overcoming such contradiction in TACT control, it may be envisaged to re-design the TACT time for each layer of the devices or to set the longest conceivable TACT time. However, these measures cannot be said to be practically acceptable in that the through-put is significantly lowered or the wafer downstream of the PEB process is maintained at an elevated temperature for long and thus in the excessively baked state without being transferred to the cooling/temperature control unit, thereby significantly deteriorating linewidth uniformity.